1. Field of the Invention
The present invention relates to a digital signal buffer circuit that is used, for instance, in a communication system for digital signal transmission, to generate an output in which a digital signal change is emphasized.
2. Background Art
A communication system disclosed, for instance, by Japanese Patent Laid-open No. 204291/2003 is provided with a transmission circuit that is mounted at the transmitting end of a communication system transmission path, and a reception circuit that is mounted at the receiving end of the communication system transmission path. The transmission circuit and reception circuit are both provided with an equalization circuit. The transmission circuit and reception circuit both include a digital signal buffer circuit. The buffer circuit having an equalization circuit adds a delayed, small-amplitude digital inverse signal to an input digital signal and generates an output digital signal, in which an input digital signal change is emphasized, to provide improved communication performance.